In recent years, as semiconductor devices have become higher in integration, functionality, and speed, demand for miniaturization of the semiconductor devices has been growing. Various device structures have been proposed for reducing an area occupied by transistors over a substrate. Among them, a field effect transistor having a fin-type structure has drawn attention. The field effect transistor having the fin-type structure is generally called a “fin-FET (fin-field effect transistor),” and has an active region made of a semiconductor region (hereinafter referred to as a fin-semiconductor region) having a thin-wall (fin) shape perpendicular to a principal surface of a substrate. In the fin-FET, side surfaces of the fin-semiconductor region can be used as channel surfaces, and therefore the area occupied by the transistors over the substrate can be reduced (see, e.g., Patent Document 1 and Non-Patent Document 1).
Patent Document 1 has proposed a technique by which ion is implanted to a fin-type silicon region in an oblique direction to form an extension region and a high-concentration impurity region as a source/drain region. The ion implantation in the oblique direction allows ion implantation to side portions of the fin-type silicon region in one direction, and ion implantation to an upper portion of the fin-type silicon region in two directions, e.g., when the impurity region is formed. Thus, an ion implantation dose amount in the impurity region of the upper portion of the fin-type silicon region is twice as much as that in the impurity region of the side portions of the fin-type silicon region. In other words, it is difficult to form a low-resistance impurity region in the side portions of the fin-type silicon region.
In recent years, attention has been drawn to plasma doping in order to dope the side surface of the fin-semiconductor region with an impurity.
Non-Patent Document 1 has proposed a pulse DC plasma technique as a plasma doping technique for forming an impurity region of a fin-FET. In the pulse DC plasma technique, plasma is intermittently generated, thereby realizing an advantage that etching of a fin-semiconductor region can be reduced.
As the plasma doping technique for forming the impurity region of the fin-FET, Patent Document 2 has proposed a plasma doping technique using an inductively-coupled plasma (ICP) method. In the ICP method, a relatively-long time domain (doping time) is used as compared to the pulse DC plasma technique, thereby realizing an advantage that doping can be uniformly performed in a surface of a large substrate such as a wafer having a diameter of 300 mm.
Although a plasma doping technique disclosed in Patent Document 3 is not intended to perform plasma doping on side surfaces of a fine narrow fin-semiconductor region, Patent Document 3 has disclosed a plasma doping technique for performing doping on side surfaces of a trench.